《Intel? 64 and IA-32体系结构：软件开发人员手册》文字版[PDF]

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中文名: Intel? 64 and IA-32体系结构：软件开发人员手册
原名: Intel? 64 and IA-32 Architectures Software Developer's Manual
作者: Intel Corporation
资源格式: PDF
版本: 文字版
出版社: Intel Corporation
书号: 25462-042US
发行时间: 2012年03月
地区: 美国
语言: 英文
简介:
汇编语言和高级语言的最根本的区别在于：在汇编语言中，程序员必须掌握数据存储和机器相关的大量细节。与高级语言相比，在声明和移动数据时，汇编器给了程序员极大的自由。汇编器只进行很少的错误检查，但却提供了大量的操作符和寻址表达式，使程序员几乎能够做任何事情。然而，这种自由是必须付出一定代价的。这种代价就是在开始编写有意义的程序之前，开发人员必须掌握大量的细节知识。因而这也是《Intel? 64 and IA-32 Architectures Software Developer's Manuall》一书的功能所在。

目录:
Volume 1: Basic Architecture
Chapter 1 About This Manual
Chapter 2 Intel? 64 and IA-32 Architectures
Chapter 3 Basic Execution Environment
Chapter 4 Data Types
Chapter 5 Instruction Set Summary
Chapter 6 Procedure Calls, Interrupts, and Exceptions
Chapter 7 Programming With General-Purpose Instructions
Chapter 8 Programming with the x87 FPU
Chapter 9 Programming with Intel? MMX? Technology
Chapter 10 Programming with Streaming SIMD Extensions (SSE)
Chapter 11 Programming with Streaming SIMD Extensions 2 (SSE2)
Chapter 12 Programming with SSE3, SSSE3, SSE4 and AESNI
Chapter 13 Programming with AVX
Chapter 14 Input/Output
Chapter 15 Processor Identification and Feature Determination
Appendix A EFLAGS Cross-Reference
Appendix B EFLAGS Condition Codes
Appendix C Floating-Point Exceptions Summary
Appendix D Guidelines for Writing x87 FPU Exception Handlers
Appendix E Guidelines for Writing SIMD Floating-Point Exception Handlers
Volume 2: Instruction Reference, A-Z
Chapter 1 About This Manual
Chapter 2 Instruction Format
Chapter 3 Instruction Set Reference, A-L
Chapter 4 Instruction Set Reference, M-Z
Chapter 5 Safer Mode Extensions Reference
Appendix A Opcode Map
Appendix B Instruction Formats and Encodings
Appendix C Intel? C/C++ Compiler Intrinsics and Functional Equivalents
Volume 3: System Programming Guide
Chapter 1 About This Manual
Chapter 2 System Architecture Overview
Chapter 3 Protected-Mode Memory Management
Chapter 4 Paging
Chapter 5 Protection
Chapter 6 Interrupt and Exception Handling
Chapter 7 Task Management
Chapter 8 Multiple-Processor Management
Chapter 9 Processor Management and Initialization
Chapter 10 Advanced Programmable Interrupt Controller (APIC)
Chapter 11 Memory Cache Control
Chapter 12 Intel? MMX? Technology System Programming
Chapter 13 System Programming For Instruction Set Extensions And Processor Extended States
Chapter 14 Power and Thermal Management
Chapter 15 Machine-Check Architecture
Chapter 16 Interpreting Machine-Check Error Codes
Chapter 17 Debugging, Branch Profiling, and Time-Stamp Counter
Chapter 18 Performance Monitoring
Chapter 19 Performance-Monitoring Events
Chapter 20 8086 Emulation
Chapter 21 Mixing 16-Bit and 32-Bit Code
Chapter 22 Architecture Compatibility
Chapter 23 Introduction to Virtual-Machine Extensions
Chapter 24 Virtual-Machine Control Structures
Chapter 25 VMX Non-Root Operation
Chapter 26 VM Entries
Chapter 27 VM Exits
Chapter 28 VMX Support for Address Translation
Chapter 29 VMX Instruction Reference
Chapter 30 Virtual-Machine Monitor Programming Considerations
Chapter 31 Virtualization of System Resources
Chapter 32 Handling Boundary Conditions in a Virtual Machine Monitor
Chapter 33 System Management Mode
Chapter 34 Model-Specific Registers (MSRs)
Appendix A VMX Capability Reporting Facility
Appendix B Field Encoding in VMCS
Appendix C VMX Basic Exit Reasons
Index

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